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Hardware Design Considerations
3.4.8
Miscellaneous Pins
Table 65 lists the board connections for the pins if they are not required by the system design. Table 65 assumes that the alternate
function of the specified pin is not used. If the alternate function is used, connect that pin as required to support the selected
function.
Table 65. Connectivity of Individual Pins When They Are Not Required
CLKOUT
EE0
EE1
GPIO[0–31]
SCL
SDA
INT_OUT
IRQ[0–15]
NMI
NMI_OUT
RC[0–16]
RC_LDF
STOP_BS
TCK
TDI
TDO
TMR[0–4]
TMS
TRST
URXD
UTXD
V DDIO
Signal Name
Pin Connection
NC
GND
NC
GND
See the GPIO connectivity guidelines in this table.
See the GPIO connectivity guidelines in this table.
NC
See the GPIO connectivity guidelines in this table.
V DDIO
NC
GND
NC
GND
GND
GND
NC
See the GPIO connectivity guidelines in this table.
GND
GND
See the GPIO connectivity guidelines in this table.
See the GPIO connectivity guidelines in this table.
3.3 V
Note:
Note:
When using I/O multiplexing mode 5 or 6, tie the TDM7TSYN/PCI_AD4 signal (ball number AC9) to GND.
For details on configuration, see the MSC8144 Reference Manual . For additional information, refer to the MSC8144
Design Checklist (AN3202).
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
75
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